CQUniversity Unit Profile
ENEX13002 Power Electronics
Power Electronics
All details in this unit profile for ENEX13002 have been officially approved by CQUniversity and represent a learning partnership between the University and you (our student).
The information will not be changed unless absolutely necessary and any change will be clearly indicated by an approved correction included in the profile.
General Information

Overview

In this unit you will build on your electronics knowledge previously acquired. You will learn more about power semiconductor devices and their modeling, such as Diodes, silicon controlled rectifiers (SCRs), metal oxide silicon field effect transistors (MOSFETs), and isolated gate bipolar junction transistors (IGBTs), including their theory of operation and limitations. You will also learn to calculate thermal dissipation requirements of power semiconductors and to choose suitable heat sinks. You will be introduced to the concepts of alternating current (AC) to direct current (DC), AC to AC, DC to DC, and DC to AC converters. The analysis of each unique circuit and its waveforms will involve much mathematics, including integration and Fourier analysis. You will also review different types of motors and learn about their drives and control, including DC motor drives and AC motor drives. You will learn to design/develop power electronics solutions and test them by simulation and prototyping in the lab. Students enrolled in distance mode are required to attend a compulsory Residential School.

Details

Career Level: Undergraduate
Unit Level: Level 3
Credit Points: 6
Student Contribution Band: 8
Fraction of Full-Time Student Load: 0.125

Pre-requisites or Co-requisites

Prerequisites: ENEX12002 Introductory Electronics OR (ENEE13018 Analogue Electronics and ENEE13020 Digital Electronics) AND (ENEX12001 Electrical Power and Machines OR ENEE12015 Electrical Power Engineering)

Important note: Students enrolled in a subsequent unit who failed their pre-requisite unit, should drop the subsequent unit before the census date or within 10 working days of Fail grade notification. Students who do not drop the unit in this timeframe cannot later drop the unit without academic and financial liability. See details in the Assessment Policy and Procedure (Higher Education Coursework).

Offerings For Term 1 - 2021

Mackay
Mixed Mode

Attendance Requirements

All on-campus students are expected to attend scheduled classes – in some units, these classes are identified as a mandatory (pass/fail) component and attendance is compulsory. International students, on a student visa, must maintain a full time study load and meet both attendance and academic progress requirements in each study period (satisfactory attendance for International students is defined as maintaining at least an 80% attendance record).

Residential Schools

This unit has a Compulsory Residential School for distance mode students and the details are:
Click here to see your Residential School Timetable.

Class and Assessment Overview

Recommended Student Time Commitment

Each 6-credit Undergraduate unit at CQUniversity requires an overall time commitment of an average of 12.5 hours of study per week, making a total of 150 hours for the unit.

Class Timetable

Bundaberg, Cairns, Emerald, Gladstone, Mackay, Rockhampton, Townsville
Adelaide, Brisbane, Melbourne, Perth, Sydney

Assessment Overview

1. Written Assessment
Weighting: 15%
2. Written Assessment
Weighting: 15%
3. Practical and Written Assessment
Weighting: 15%
4. Practical and Written Assessment
Weighting: 15%
5. Take Home Exam
Weighting: 40%

Assessment Grading

This is a graded unit: your overall grade will be calculated from the marks or grades for each assessment task, based on the relative weightings shown in the table above. You must obtain an overall mark for the unit of at least 50%, or an overall grade of ‘pass’ in order to pass the unit. If any ‘pass/fail’ tasks are shown in the table above they must also be completed successfully (‘pass’ grade). You must also meet any minimum mark requirements specified for a particular assessment task, as detailed in the ‘assessment task’ section (note that in some instances, the minimum mark for a task may be greater than 50%). Consult the University’s Grades and Results Policy for more details of interim results and final grades.

Previous Student Feedback

Feedback, Recommendations and Responses

Every unit is reviewed for enhancement each year. At the most recent review, the following staff and student feedback items were identified and recommendations were made.

Feedback from Unit Evaluation

Feedback

Weekly Zoom support meetings were very useful and helpful that they were recorded

Recommendation

Keep the weekly Zoom support meetings. Invite questions via email and Q&A forum for non-attending students.

Feedback from Unit Evaluation

Feedback

Limiting the scope and content of the textbook to be relevant to the unit was very helpful.

Recommendation

Keep this approach and keep adding examples where content would be applicable in the workplace.

Feedback from Unit Evaluation

Feedback

Self-paced learning is facilitated by all the unit material is online and available.

Recommendation

Keep this approach and improve further.

Unit Learning Outcomes
On successful completion of this unit, you will be able to:
  1. Explain the construction of power semiconductor devices, their principle of operation, and their suitability for various switching functions
  2. Model power electronic devices for accurate circuit analysis, including their thermal performance
  3. Analyse and model the operation of single-phase and three-phase power electronic circuits, including alternating current (AC) to direct current (DC), AC to AC, DC to DC, and DC to AC topologies
  4. Compare and select power electronic components, converters, and drives for a mechatronic system
  5. Analyse and design variable speed motor drives and controllers for different types of electric motors and evaluate their performances
  6. Solve real life problems and communicate professionally using power electronics terminology
  7. Work collaboratively and autonomously and communicate professionally in presenting your solutions.

Learning Outcomes are linked to Engineers Australia Stage 1 Competencies and also discipline capabilities. You can find the mapping for this on the Engineering Undergraduate Course website.

Alignment of Learning Outcomes, Assessment and Graduate Attributes
N/A Level
Introductory Level
Intermediate Level
Graduate Level
Professional Level
Advanced Level

Alignment of Assessment Tasks to Learning Outcomes

Assessment Tasks Learning Outcomes
1 2 3 4 5 6 7
1 - Written Assessment - 15%
2 - Written Assessment - 15%
3 - Practical and Written Assessment - 15%
4 - Practical and Written Assessment - 15%
5 - Take Home Exam - 40%

Alignment of Graduate Attributes to Learning Outcomes

Graduate Attributes Learning Outcomes
1 2 3 4 5 6 7
1 - Communication
2 - Problem Solving
3 - Critical Thinking
4 - Information Literacy
5 - Team Work
6 - Information Technology Competence
7 - Cross Cultural Competence
8 - Ethical practice
9 - Social Innovation

Alignment of Assessment Tasks to Graduate Attributes

Assessment Tasks Graduate Attributes
1 2 3 4 5 6 7 8 9
1 - Written Assessment - 15%
2 - Written Assessment - 15%
3 - Practical and Written Assessment - 15%
4 - Practical and Written Assessment - 15%
5 - Take Home Exam - 40%
Textbooks and Resources

Textbooks

Prescribed

Power Electronics Devices, Circuits, and Applications 4th Edition (International) (2014)

Authors: Muhammad H. Rashid
Pearson Education Ltd.
Harlaw Harlaw , Essex , England
ISBN: 978-0-273-76908-8
Binding: Paperback

IT Resources

You will need access to the following IT resources:
  • CQUniversity Student Email
  • Internet
  • Unit Website (Moodle)
  • Multisim 14.0 Education Edition or later (CQU will provide the licence key to install it on student computers).
Referencing Style

All submissions for this unit must use the referencing style: Harvard (author-date)

For further information, see the Assessment Tasks.

Teaching Contacts
Piet Janse Van Rensburg Unit Coordinator
p.jansevanrensburg@cqu.edu.au
Schedule
Week 1 Begin Date: 08 Mar 2021

Module/Topic

  • Introduction to Power Electronics
  • Power Diodes and LRC Circuits

Chapter

Chapters 1 & 2

Events and Submissions/Topic


Week 2 Begin Date: 15 Mar 2021

Module/Topic

  • Diode Rectifiers

Chapter

Chapter 3

Events and Submissions/Topic


Week 3 Begin Date: 22 Mar 2021

Module/Topic

  • Power Transistors

Chapter

Chapter 4

Events and Submissions/Topic


Week 4 Begin Date: 29 Mar 2021

Module/Topic

  • DC - DC Conversions

Chapter

Chapter 5

Events and Submissions/Topic


Week 5 Begin Date: 05 Apr 2021

Module/Topic

  • DC - AC Converters

Chapter

Chapter 6

Events and Submissions/Topic


Vacation Week Begin Date: 12 Apr 2021

Module/Topic


Chapter


Events and Submissions/Topic


Week 6 Begin Date: 19 Apr 2021

Module/Topic

  • Multilevel Inverters

Chapter

Chapter 8

Events and Submissions/Topic



Assignment 1 Due: Week 6 Wednesday (21 Apr 2021) 10:00 pm AEST
Week 7 Begin Date: 26 Apr 2021

Module/Topic

  • Resonant Pulse Inverters

Chapter

Chapter 7

Events and Submissions/Topic


Week 8 Begin Date: 03 May 2021

Module/Topic

  • Thyristors
  • Controlled Rectifiers

Chapter

Chapters 9 + 10

Events and Submissions/Topic

Design and Build Exercise Due: Week 8 Wednesday (5 May 2021) 10:00 pm AEST
Week 9 Begin Date: 10 May 2021

Module/Topic

  • AC Voltage Controllers

Chapter

Chapter 11

Events and Submissions/Topic


Week 10 Begin Date: 17 May 2021

Module/Topic

  • DC Drives

Chapter

Chapter 14

Events and Submissions/Topic



Assignment 2 Due: Week 10 Wednesday (19 May 2021) 10:00 pm AEST
Week 11 Begin Date: 24 May 2021

Module/Topic

  • AC Drives

Chapter

Chapter 15

Events and Submissions/Topic

Week 12 Begin Date: 31 May 2021

Module/Topic

  • Introduction to Renewable Energy

Chapter

Chapter 16

Events and Submissions/Topic



Laboratory Experiments Due: Week 12 Wednesday (2 Jun 2021) 10:00 pm AEST
Review/Exam Week Begin Date: 07 Jun 2021

Module/Topic


Chapter


Events and Submissions/Topic


Exam Week Begin Date: 14 Jun 2021

Module/Topic


Chapter


Events and Submissions/Topic


Assessment Tasks

1 Written Assessment

Assessment Title
Assignment 1

Task Description

This individual assignment together with feedback, helps to prepare you for the final exam.

The unit content from Weeks 1 to 4 will be tested in Assignment 1. Questions will be largely analysis based.

Individual work is mandatory - this is a take-home test. None of your steps or solutions may be discussed or divulged to a fellow student.

Please refer to the CQU plagiarism policy - a signed cover page declaring individual work is required.

The assignment questions will be released on the unit website at least 2 weeks before the assignment is due to be submitted.

To prevent electronic plagiarism, typed submissions are not acceptable. Students should scan clear and legible hand written work for online submission as a PDF file.


Assessment Due Date

Week 6 Wednesday (21 Apr 2021) 10:00 pm AEST


Return Date to Students

We strive to return assessments to students within 2 weeks.


Weighting
15%

Assessment Criteria

Marks will be allocated for the followings:

  1. Application of theoretical fundamentals.
  2. Explanation of reasons to apply specific theory or method to solve a given problem where applicable.
  3. Correct circuit diagrams/schematics and relevant input/output waveforms.
  4. Correct mathematical working and correct answers.
  5. All work and intermediate steps must be shown with justification of steps taken.
  6. Assignments must be tidy and legible.


Referencing Style

Submission
Online

Submission Instructions
1) Plagiarism statement and 2) complete hand-written assignment scanned in together as a single .pdf file

Learning Outcomes Assessed
  • Explain the construction of power semiconductor devices, their principle of operation, and their suitability for various switching functions
  • Model power electronic devices for accurate circuit analysis, including their thermal performance
  • Analyse and model the operation of single-phase and three-phase power electronic circuits, including alternating current (AC) to direct current (DC), AC to AC, DC to DC, and DC to AC topologies


Graduate Attributes
  • Communication
  • Problem Solving
  • Critical Thinking
  • Information Technology Competence

2 Written Assessment

Assessment Title
Assignment 2

Task Description

This individual analysis and design based assignment helps to prepare you for the final exam.

The unit content from Weeks 5 to 9 will be tested in Assignment 2.

Individual work is mandatory - this is a take-home test. None of your steps or solutions may be discussed or divulged to a fellow student.

Please refer to the CQU plagiarism policy - a signed cover page declaring individual work is required.

The assignment questions will be released on the unit website at least 2 weeks before the assignment is due to be submitted.

To prevent electronic plagiarism, typed submissions are not acceptable. Students should scan clear and legible hand written work for online submission as a PDF file.


Assessment Due Date

Week 10 Wednesday (19 May 2021) 10:00 pm AEST


Return Date to Students

We strive to return assessments to students within 2 weeks.


Weighting
15%

Assessment Criteria

Marks will be allocated for the followings:

  1. Application of theoretical fundamentals.
  2. Correct theory or method deployed to analyse and/or design power electronic circuitry where applicable.
  3. Correct circuit diagrams/schematics and relevant input/output waveforms.
  4. Correct mathematical working and correct answers.
  5. All work and intermediate steps must be shown with justification of steps taken.
  6. Assignments must be tidy and legible.


Referencing Style

Submission
Online

Submission Instructions
1) Plagiarism statement, 2) complete hand-written assignment and 3) screen shot of Multisim circuit and results - all scanned in together as a single .pdf file

Learning Outcomes Assessed
  • Explain the construction of power semiconductor devices, their principle of operation, and their suitability for various switching functions
  • Model power electronic devices for accurate circuit analysis, including their thermal performance
  • Analyse and model the operation of single-phase and three-phase power electronic circuits, including alternating current (AC) to direct current (DC), AC to AC, DC to DC, and DC to AC topologies


Graduate Attributes
  • Communication
  • Problem Solving
  • Critical Thinking
  • Information Technology Competence

3 Practical and Written Assessment

Assessment Title
Design and Build Exercise

Task Description

In this individual assessment you will design two kinds of DC-DC power converters to a given specification. Detailed design criteria will be released on the unit website.

You need to submit a Design Report in Week 8 showing both your designs. The Design Report will carry a weight of 8 marks (out of 15) and will be assessed individually.

In the lab, only one designed circuit of each student is to be constructed and evaluated. The lecturer involved will assist with this decision.

The Final Design and Build Report includes the testing results and is again assessed individually. Each student should submit a personal signed cover page declaring that individual work was done.

Reports must be professional and typed, including references.

Photographic evidence is required to prove that your circuit was constructed and measurements were obtained - for this reason it is required that your hand or fingers be included in all your photographs as a 'signature'.

Each student is to report on his own (one) circuit as tested in the lab. This part carries 7 marks (out of 15) allocated for this assessment item.

Laboratory sessions are to be published the unit website.

Laboratories are compulsory and all students must attend and pass all laboratory assessments in order to pass the unit.


Assessment Due Date

Week 8 Wednesday (5 May 2021) 10:00 pm AEST

Take note that the Design report is due in week 8. The final, combined Design + Build/Test report is due in Week 13.


Return Date to Students

We strive to return assessments to students within 2 weeks.


Weighting
15%

Minimum mark or grade
A minimum of 50% must be attained for the Design and Build exercises in order to pass the unit.

Assessment Criteria

Design and Build Reports will be graded using the following criteria:

  • Correct description of laboratory concepts and procedures;
  • Correct calculations, design steps and thinking displayed;
  • Photographic evidence that circuit was constructed;
  • Correct measurements, answers and units;
  • Photographic and other evidence that correct results / measurements were obtained;
  • Discussion and understanding of test results;
  • Individual reports must be professional and typed, including references;
  • Two designs and one 'build' must be submitted by each student.
More information will be released on the unit website.


Referencing Style

Submission
Online

Submission Instructions
Submit Part I of the design report as a single pdf plus submit all Multisim files. Submit part II of the assessment as a design, test and evaluation report (as a single pdf file).

Learning Outcomes Assessed
  • Explain the construction of power semiconductor devices, their principle of operation, and their suitability for various switching functions
  • Model power electronic devices for accurate circuit analysis, including their thermal performance
  • Analyse and model the operation of single-phase and three-phase power electronic circuits, including alternating current (AC) to direct current (DC), AC to AC, DC to DC, and DC to AC topologies
  • Compare and select power electronic components, converters, and drives for a mechatronic system
  • Analyse and design variable speed motor drives and controllers for different types of electric motors and evaluate their performances
  • Solve real life problems and communicate professionally using power electronics terminology
  • Work collaboratively and autonomously and communicate professionally in presenting your solutions.


Graduate Attributes
  • Communication
  • Problem Solving
  • Critical Thinking
  • Information Technology Competence
  • Ethical practice

4 Practical and Written Assessment

Assessment Title
Laboratory Experiments

Task Description

This assessment item consists of a series of laboratory experiments on plug-and-play power electronic circuits and drives.

Teams of 2 students should be formed, and only ONE combined report needs to be submitted by BOTH students. Each student should submit a personal signed cover page declaring the team work done, specifying the other team member's name.

Team reports must be professional and typed, including references.

Photographic evidence is required to prove that the various circuits were constructed and measurements were obtained - for this reason it is required that a team member's hand or fingers be included in all your photographs as a 'signature'.

Laboratory sessions are to be published the unit website.

Laboratories are compulsory and all students must attend and pass all laboratory assessments in order to pass the unit.

Detailed explanations of these experiments and how to carry them out will be posted on the unit website at the start of the term.


Assessment Due Date

Week 12 Wednesday (2 Jun 2021) 10:00 pm AEST

Each student should submit a copy of their combined team report.


Return Date to Students

We strive to return assessments to students within 2 weeks.


Weighting
15%

Minimum mark or grade
A minimum of 50% must be attained for the Laboratory Exercises report in order to pass the unit.

Assessment Criteria

Laboratory Exercise Reports will be graded using the following criteria:

  • Correct description of laboratory concepts and procedures;
  • Correct calculations, analysis and thinking;
  • Photographic evidence that circuits were constructed by the team;
  • Correct measurements, answers and units;
  • Photographic and other evidence that correct results / measurements were obtained by the team;
  • Discussion and understanding of laboratory results;
  • Team reports must be professional and typed, including references;
  • All laboratory exercises must be attempted.


Referencing Style

Submission
Online

Submission Instructions
Submit as a single pdf file

Learning Outcomes Assessed
  • Explain the construction of power semiconductor devices, their principle of operation, and their suitability for various switching functions
  • Model power electronic devices for accurate circuit analysis, including their thermal performance
  • Analyse and model the operation of single-phase and three-phase power electronic circuits, including alternating current (AC) to direct current (DC), AC to AC, DC to DC, and DC to AC topologies
  • Compare and select power electronic components, converters, and drives for a mechatronic system
  • Analyse and design variable speed motor drives and controllers for different types of electric motors and evaluate their performances
  • Solve real life problems and communicate professionally using power electronics terminology
  • Work collaboratively and autonomously and communicate professionally in presenting your solutions.


Graduate Attributes
  • Communication
  • Problem Solving
  • Critical Thinking
  • Team Work
  • Information Technology Competence
  • Ethical practice

5 Take Home Exam

Assessment Title
TAKE-HOME EXAM

Task Description

The Take-Home Exam will be released at 09:00 am AEST on the day (timetable to be published towards the end of term).

This will be an 'open resource' exam including the internet, but you will be required to sign a declaration of individual work done.

I.e. no contact with fellow students or any person proficient in the field, neither virtual contact via the internet to exchange information etc.

5 Hours will be allowed (due 14:00), but this includes scanning and uploading.

It is strongly advised to take one or more break during the 5-hour period and also to eat and drink something.

Late penalties will be deducted at 20% per hour (or proportional part).

Questions during the 5-hour period will be taken via email and where necessary, responses will be sent out to everyone via Q&A emails.


Assessment Due Date

To be advised, please consult the unit Moodle page closer to the time.


Return Date to Students

Weighting
40%

Minimum mark or grade
A minimum of 50% must be attained for the Take-Home Exam in order to pass the unit.

Assessment Criteria

Marks will be allocated for the followings:

  1. Application of theoretical fundamentals.
  2. Correct theory or method deployed to analyse and/or design power electronic circuitry where applicable.
  3. Correct circuit diagrams/schematics and relevant input/output waveforms.
  4. Correct mathematical working and correct answers.
  5. All work and intermediate steps must be shown with justification of steps taken.
  6. Work must be tidy and legible.


Referencing Style

Submission
Online

Submission Instructions
Submit as a single pdf file.

Learning Outcomes Assessed
  • Explain the construction of power semiconductor devices, their principle of operation, and their suitability for various switching functions
  • Model power electronic devices for accurate circuit analysis, including their thermal performance
  • Analyse and model the operation of single-phase and three-phase power electronic circuits, including alternating current (AC) to direct current (DC), AC to AC, DC to DC, and DC to AC topologies
  • Analyse and design variable speed motor drives and controllers for different types of electric motors and evaluate their performances


Graduate Attributes
  • Communication
  • Problem Solving
  • Critical Thinking
  • Information Technology Competence
  • Ethical practice

Academic Integrity Statement

As a CQUniversity student you are expected to act honestly in all aspects of your academic work.

Any assessable work undertaken or submitted for review or assessment must be your own work. Assessable work is any type of work you do to meet the assessment requirements in the unit, including draft work submitted for review and feedback and final work to be assessed.

When you use the ideas, words or data of others in your assessment, you must thoroughly and clearly acknowledge the source of this information by using the correct referencing style for your unit. Using others’ work without proper acknowledgement may be considered a form of intellectual dishonesty.

Participating honestly, respectfully, responsibly, and fairly in your university study ensures the CQUniversity qualification you earn will be valued as a true indication of your individual academic achievement and will continue to receive the respect and recognition it deserves.

As a student, you are responsible for reading and following CQUniversity’s policies, including the Student Academic Integrity Policy and Procedure. This policy sets out CQUniversity’s expectations of you to act with integrity, examples of academic integrity breaches to avoid, the processes used to address alleged breaches of academic integrity, and potential penalties.

What is a breach of academic integrity?

A breach of academic integrity includes but is not limited to plagiarism, self-plagiarism, collusion, cheating, contract cheating, and academic misconduct. The Student Academic Integrity Policy and Procedure defines what these terms mean and gives examples.

Why is academic integrity important?

A breach of academic integrity may result in one or more penalties, including suspension or even expulsion from the University. It can also have negative implications for student visas and future enrolment at CQUniversity or elsewhere. Students who engage in contract cheating also risk being blackmailed by contract cheating services.

Where can I get assistance?

For academic advice and guidance, the Academic Learning Centre (ALC) can support you in becoming confident in completing assessments with integrity and of high standard.

What can you do to act with integrity?